Copper-to-optics technology eyed for next-gen AI networking gear

Broadcom’s demonstration and a follow-up session explored the benefits of further developing CPC, such as reduced signal integrity penalties and extended reach, through channel modeling and simulations, Broadcom wrote in a blog about the DesignCon event.

“Experimental results showed successful implementation of CPC, demonstrating its potential to address bandwidth and signal integrity challenges in data centers, which is crucial for AI applications,” Broadcom stated.

In addition to the demo, Broadcom and Samtec also authored a white paper on CPC that stated: “Co-packaged connectivity (CPC) provides the opportunity to omit loss and reflection penalties from the [printed circuit board (PCB)] and the package. When high speed I/O is cabled from the top of the package advanced PCB materials are not necessary. Losses from package vertical paths and PCB routing can be transferred to the longer reach of cables,” the authors stated.

“As highly complex systems are challenged to scale the number of I/O and their reach, co- packaged connectivity presents opportunity. As we approach 224G-PAM4 [which uses optical techniques to support 224 Gigabits per second data rates per optical lane] and above, system loss and dominating noise sources necessitate the need to re-consider that which has been restricted in the back of the system architect’s mind for years: What if we attached to the package?”

At OFC, Samtec demonstrated its Si-FlyHD co-packaged cable assemblies and Samtec FlyoverOctal Small Form-factor Pluggable (OSFP) over the Samtec Eye Speed Hyper Low Skew twinax copper cable. Flyover is Samtec’s proprietary way of addressing signal integrity and reach limitations of routing high-speed signals through traditional printed circuit boards (PCBs).

“This evaluation platform incorporates Broadcom’s industry-leading 200G SerDes technology and Samtec’s co-packaged Flyover technology. Si-Fly HD CPC offers the industry’s highest footprint density and robust interconnect which enables 102.4T (512 lanes at 200G) in a 95 x 95 mm chip substrate,” Samtec wrote.